1. Technical Field
The present invention relates to an apparatus for inspecting defects of devices and a method of inspecting defects, in particular, to an apparatus for inspecting defects of devices useful for detecting defects of disconnection and short circuits of electric wiring and a method of inspecting defects.
2. Description of the Prior Art
A manufacturing process of a semiconductor is composed of iteration of serial processes such as exposure, etching, film forming and doping. Depending on maturity of a manufacturing process used, defect (form defects and electrical defects) inspection and dimension measurement are carried out between processes. From a viewpoint of early start-up of the manufacturing process, it is necessary to feed back the data from these inspection apparatuses and measuring apparatuses promptly to the manufacturing process. As for form inspection apparatuses for inspecting foreign particles on a device or abnormal forms thereof, there are optical microscopes and scanning electron microscopes. On the other hand, as for inspection apparatuses for electric defects such as disconnection and short circuits of wiring in a device, there are scanning electron microscopes (hereinafter referred to as “SEM”) and inspection apparatuses utilizing voltage contrasts in images from scanning ion microscopes (hereinafter referred to as “SIM”). The latter inspection apparatuses using an electron beam or a focused ion beam (hereinafter referred to as “FIB”) are disclosed, for example, in Japanese Patent Laid-Open Publications Hei 9 (1997)-326425, Hei 10 (1998)-313027 and Hei 11 (1999)-121559.
In a voltage contrast image, a voltage on a component forming the image determines luminance of the component in the image. Such voltage on the component may be applied thereto with a mechanical probe (a conductor probe) or by bestowment of electric charges from the scanning beam itself. In the latter case, since floating conductors (such as wiring) are charged slightly positive, they seem dark or drab in the case of observing SIM images with an optimized inspection apparatus. On the contrary, since electric charges are not stored in grounded conductors, they are observed as images of the same brightness. Moreover, in order to optimize detecting capability of voltage contrasts, also known is provision of filter mesh in which bias electric potential is applied between a sample and a secondary electron detector.
Either a conductor probe which is loaded on a sample stage and moves synchronously with the sample stage (hereinafter referred to as a “sample stage synchronous type conductor probe”), or a conductor probe which is fixed (to a ceiling face of a sample chamber, for example,) relatively with respect to an FIB generator (hereinafter referred to as a “fixed type conductor probe”) is adopted as the conductor probe of a conventional inspection apparatus.
Although a chip size of a silicon integrated circuit changes along with its generation, the chip size of the current generation and the next generation is a square of about 20 to 25 mm, in the meantime, one unit size of a test element group (TEG) thereof is a square of about 1 to 2.5 mm, and a minimum width of wiring thereof is 0.1 to 0.5 μm. Here, the TEG refers to a test element group for monitoring characteristic values and manufacturing processes of various elements such as transistors, capacitors, resistors and wiring. Meanwhile, in defect observation of TEG pattern wiring of 0.1 μm level with a conventional FIB apparatus, for example, when 0.1 μm is allotted to 4 pixels in an SIM image, then a visual field of a 1024×1024 pixel SIM image is equivalent to a square of about 26 μm. Such a size is 1/40 to 1/200 as small as one TEG unit size that is a square of 1 to 2.5 mm. However, operability will be improved if a visual field of an SIM image at a minimum magnification can almost cover a full range of the one TEG unit by combination of a beam shift function that shifts an original point of the visual filed of the SIM image. Nevertheless, even if coverage of the one TEG unit being the square of 1 to 2.5 mm is achieved, it is yet impossible to observe SIM images of circuit wiring patterns of all TEGs formed within one chip without moving the sample stage.
The conductor probe in the conventional inspection apparatus is either the sample stage synchronous type conductor probe that is loaded on the sample stage and moves synchronously with the sample stage, or the fixed type conductor probe that is relatively fixed with respect to the FIB generator. In general, there is a tendency that accuracies of moving positions become worse as a moving range of a tip of the conductor probe becomes wider. For this reason, a conductor probe that satisfies both wide-range moving across an entire surface of one chip (a square of about 20 to 25 mm) and high-accuracy moving positions within a visual filed of an SIM image at the minimum magnification (a square of 1 to 2.5 mm) had been yet to be found.
In consideration of the above-described problem of the prior art, an object of the present invention is to provide an apparatus for inspecting defects of devices that satisfies the demand for both wide-range moving and high-accuracy positioning moving within a narrow range and that improves usability of a conductor probe thereof for achieving higher inspection efficiency, and a method of inspecting defects.